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2002 Microchip Technology Inc.

Preliminary

DS30453D-page 21

PIC16C5X

5.1

Power-On Reset (POR)

The PIC16C5X family incorporates on-chip Power-On

Reset (POR) circuitry which provides an internal chip

RESET for most power-up situations. To use this fea-

ture, the user merely ties the MCLR/VPP pin to VDD. A

simplified block diagram of the on-chip Power-On

Reset circuit is shown in Figure 5-1.

The Power-On Reset circuit and the Device Reset

Timer (Section 5.2) circuit are closely related. On

power-up, the RESET latch is set and the DRT is

RESET. The DRT timer begins counting once it detects

MCLR to be high. After the time-out period, which is

typically 18 ms, it will RESET the reset latch and thus

end the on-chip RESET signal.

A power-up example where MCLR is not tied to VDD is

shown in Figure 5-3. VDD is allowed to rise and stabilize

before bringing MCLR high. The chip will actually come

out of reset TDRT msec after MCLR goes high.

In Figure 5-4, the on-chip Power-On Reset feature is

being used (MCLR and VDD are tied together). The VDD

is stable before the start-up timer times out and there is

no problem in getting a proper RESET. However,

Figure 5-5 depicts a problem situation where VDD rises

too slowly. The time between when the DRT senses a

high on the MCLR/VPP pin, and when the MCLR/VPP

pin (and VDD) actually reach their full value, is too long.

In this situation, when the start-up timer times out, VDD

has not reached the VDD (min) value and the chip is,

therefore, not guaranteed to function correctly. For

such situations, we recommend that external RC cir-

cuits be used to achieve longer POR delay times

(Figure 5-2).

For more information on PIC16C5X POR, see

Power-

Up Considerations - AN522 in the Embedded Control

Handbook.

The POR circuit does not produce an internal RESET

when VDD declines.

FIGURE 5-2:

EXTERNAL POWER-ON

RESET CIRCUIT (FOR

SLOW VDD POWER-UP)

Note:

When the device starts normal operation

(exits the RESET condition), device oper-

ating parameters (voltage, frequency, tem-

perature, etc.) must be met to ensure

operation. If these conditions are not met,

the device must be held in RESET until the

operating conditions are met.

MCLR

PIC16C5X

VDD

External Power-On Reset circuit is required

only if VDD power-up is too slow. The diode D

helps discharge the capacitor quickly when

VDD powers down.

R < 40 k

is recommended to make sure that

voltage drop across R does not violate the

device electrical specification.

R1 = 100

to 1 k will limit any current flow-

ing into MCLR from external capacitor C in the

event of MCLR pin breakdown due to Electro-

static Discharge (ESD) or Electrical Over-

stress (EOS).

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